NXP Semiconductors /MIMXRT1011 /AIPSTZ1 /OPACR

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Interpret as OPACR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TP0)OPAC70 (TP0)OPAC60 (TP0)OPAC50 (TP0)OPAC40 (TP0)OPAC30 (TP0)OPAC20 (TP0)OPAC10 (TP0)OPAC0

OPAC4=TP0, OPAC2=TP0, OPAC0=TP0, OPAC5=TP0, OPAC7=TP0, OPAC6=TP0, OPAC1=TP0, OPAC3=TP0

Description

Off-Platform Peripheral Access Control Registers

Fields

OPAC7

Off-platform Peripheral Access Control 7

0 (TP0): Accesses from an untrusted master are allowed.

1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.

OPAC6

Off-platform Peripheral Access Control 6

0 (TP0): Accesses from an untrusted master are allowed.

1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.

OPAC5

Off-platform Peripheral Access Control 5

0 (TP0): Accesses from an untrusted master are allowed.

1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.

OPAC4

Off-platform Peripheral Access Control 4

0 (TP0): Accesses from an untrusted master are allowed.

1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.

OPAC3

Off-platform Peripheral Access Control 3

0 (TP0): Accesses from an untrusted master are allowed.

1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.

OPAC2

Off-platform Peripheral Access Control 2

0 (TP0): Accesses from an untrusted master are allowed.

1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.

OPAC1

Off-platform Peripheral Access Control 1

0 (TP0): Accesses from an untrusted master are allowed.

1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.

OPAC0

Off-platform Peripheral Access Control 0

0 (TP0): Accesses from an untrusted master are allowed.

1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.

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